TRON08014 2019 Programmable Logic Technology
On completion, the learner will have been exposed to current programmable logic technologies in terms of features, architecture and use of design tools. Users will implement a set of logic designs from concept/brief through to implementation.
Learning Outcomes
On completion of this module the learner will/should be able to;
Research and report on the main features of FPGAs and/or other programmable technologies available in the market today.
Describe and compare various architectures of modern FPGAs.
Develop an awareness of typical applications of FPGAs and other programmable technologies.
Use a design environment to perform simulation and synthesis solutions to various VHDL programs
Develop, implement and test logic solutions to prescribed logic problems using VHDL
Teaching and Learning Strategies
Lectures
Laboratory exercises
Group Mini-project
Module Assessment Strategies
Written report
Group Presentation
Lab exercies / simulation exercises
Repeat Assessments
This is a 60% final exam. If CA was unable to be completed for valid reasons during the semester, the lecture may, at his/her discretion may assign CA work.
Indicative Syllabus
Introduction to FPGA's: Fundamental Concepts, The Origin of FPGA's, Alternative Architectures, The Vendors.
Examination of ASICs and uses in the electronics industry. How they differ from FPGAs
Programming/Configuring FPGA's.
FPGA Design Tools: Simulation, Synthesis, Verification.
Introduction to VHDL.
Basic Language Concepts: Simulation and Synthesis.
Modelling Behaviour: Simulation, Synthesis and Structure.
Subprograms, Packages and Libraries.
Identifiers, Data Types and Operators.
Sequential Statements.
Indicative Practicals/Projects
Research and report on an application of an FPGA in the commercial world.
Various lab exercises using FPGA target board and Xilinx/Altera software to simulate/synthesize Combinational Logic Functions, Sequential Logic Functions, State Machines, etc.
Use of Altera Quartus II to synthesise and simulate FPGA solutions
Research group mini-project on a specific feature of FPGA - PPT presentation by group at end of module.
Coursework & Assessment Breakdown
Coursework Assessment
Title | Type | Form | Percent | Week | Learning Outcomes Assessed | |
---|---|---|---|---|---|---|
1 | Practical assessments | Coursework Assessment | Assessment | 20 % | OnGoing | 4,5 |
2 | Research into applications | Coursework Assessment | Written Report/Essay | 5 % | Week 3 | 3 |
3 | Research into one main specific FPGA feature | Project | Group Project | 15 % | Week 10 | 1 |
End of Semester / Year Assessment
Title | Type | Form | Percent | Week | Learning Outcomes Assessed | |
---|---|---|---|---|---|---|
1 | Final Exam Can include practical exam | Final Exam | Closed Book Exam | 60 % | End of Term | 2,3,5 |
Full Time Mode Workload
Type | Location | Description | Hours | Frequency | Avg Workload |
---|---|---|---|---|---|
Lecture | Not Specified | Theory | 2 | Weekly | 2.00 |
Supervision | Engineering Laboratory | Practical | 2 | Weekly | 2.00 |
Part Time Mode Workload
Type | Location | Description | Hours | Frequency | Avg Workload |
---|---|---|---|---|---|
Lecture | Distance Learning Suite | Theory | 1 | Weekly | 1.00 |
Supervision | Online | Practical assignments attempted in learner's environment | 2 | Weekly | 2.00 |
Directed Learning | Online | Directed research and assignments | 1 | Weekly | 1.00 |
Required & Recommended Book List
2017-02-23 FPGAs: Fundamentals, Advanced Features, and Applications in Industrial Electronics CRC Press
ISBN 1439896992 ISBN-13 9781439896990
Effective Coding with VHDL: Principles and Best Practice Unknown
DESIGN OF DIGITAL SYSTEMS USING VHDL: LEARN BY EXAMPLES Unknown
Module Resources
None
None
Quartus Primt University Edition Programming Environment (Intel)
https://www.intel.com/content/www/us/en/software/programmable/quartus-prime/overview.html
As this is a growth area in electronics, it is proposed that a guest speaker with experience of this area from industry would be invited to speak on their views and experiences
None