TRON08005 2013 Advanced Embedded Systems
This module introduces students to the architecture of a 32-bit RISC microcontroller.
Learning Outcomes
On completion of this module the learner will/should be able to;
Discuss the history and background of a 32-bit RISC processor.
Summarize the characteristics of a 32-bit RISC processor.
Select a suitable 32-bit RISC processor for an embedded application.
Analyze the Instruction Set Architecture of a 32-bit RISC device.
Generate assembly code for a 32-bit RISC processor.
Teaching and Learning Strategies
It is proposed that a workplace engagement component will be introduced to this module via a guest lecturer from industry, an industrial site visit or a work-based assignment where possible.
Indicative Syllabus
Introduction: Background of a 32-bit RISC processor, History, Architecture Versions, Processor Naming, 32-bit Instruction Set, 16-bit Instruction Set, Processor Applications.
Registers: General Purpose, Stack Pointers, Link, Program Counter, Special Registers.
Operation Modes: Thread and Handler.
Interrupts and Exceptions: Nest Interrupt Support, Vectored Interrupt Support, Dynamic Priority Changes, Interrupt Latency, Masking.
Memory Map: System Level, External Devices, External RAM, Peripherals, SRAM, Code.
Bus Interface: Code Memory, System, Private Peripheral.
Microprocessor Unit: Selection of a suitable processor.
Instruction Set: Data Processing, Branch, Load-Store, Interrupt, Program Status Register, Loading Constants, Conditional Execution.
Assembly Programming: Interface between assembly and C, First Program, Producing Outputs, “Hello World” Example, Using Data Memory.
Characteristics of Processor: Performance, Interrupt Handling, Low Power Consumption and High Energy Efficiency, System Features, JTAG Debug Support.
Coursework & Assessment Breakdown
Coursework Assessment
Title | Type | Form | Percent | Week | Learning Outcomes Assessed | |
---|---|---|---|---|---|---|
1 | Practical Evaluation Lab Assignments | Coursework Assessment | UNKNOWN | 15 % | OnGoing | 4,5 |
2 | Continuous Assessment Written Exam | Coursework Assessment | UNKNOWN | 15 % | Any | 1,2,3,4,5 |
End of Semester / Year Assessment
Title | Type | Form | Percent | Week | Learning Outcomes Assessed | |
---|---|---|---|---|---|---|
1 | Final Exam Written Exam | Final Exam | UNKNOWN | 70 % | End of Term | 1,2,4,5 |
Full Time Mode Workload
Type | Location | Description | Hours | Frequency | Avg Workload |
---|---|---|---|---|---|
Lecture | Flat Classroom | Theory Lecture | 2 | Weekly | 2.00 |
Practical / Laboratory | Engineering Laboratory | Practical | 2 | Weekly | 2.00 |
Part Time Mode Workload
Type | Location | Description | Hours | Frequency | Avg Workload |
---|---|---|---|---|---|
Lecture | Not Specified | Theory Lecture | 2 | Weekly | 2.00 |
Practical / Laboratory | Engineering Laboratory | Practical | 2 | Weekly | 2.00 |
Module Resources
The Definitive Guide to the ARM CORTEX-M3, Joseph Yiu, Newnes.
ARM System Developer's Guide, A.N.Sloss, D.Symes, C.Wright, Elsevier.
ARM system-on-chip architecture, S.Furber, Addison Wesley.
ARM Assembly Laguage, William Hohl, CRC Press.
The ARM RISC Chip, A.Van Someren, C.Atack, Pearson Education.
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